Microchip Microcontroller Unlock

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Microchip Technology Incorporated is a leading provider of smart, connected and secure embedded control solutions. Its easy-to-use development tools and comprehensive product portfolio enable customers to create optimal designs, which reduce risk while lowering total system cost and time to market. The company's solutions serve more than 120,000 customers across the industrial, automotive, consumer, aerospace and defense, communications and computing markets. Headquartered in Chandler, Arizona, Microchip offers outstanding technical support along with dependable delivery and quality. Unlock the full potential of the device by using the advanced programming interface.

Most countertop cooking appliances like electric ranges, skillets and fryers have an adjustable mechanical thermostat to vary the heat output of the range. This solution is inexpensive, but there are several drawbacks to mechanical thermostats: Mechanical thermostats have to be calibrated at the factory. They have poor simmer performance (control is not precise at low temperatures). The accuracy of these devices is poor. Mechanical components wear out over time. This application note will describe a low-cost microcontroller-based replacement for the mechanical thermostat which eliminates these drawbacks. The PIC10F204, Microchip's 6-pin PICmicro microcontroller (SOT-23 package), is used to implement this solution. The PICmicro gathers user inputs from a potentiometer and controls current to the heating element via a triac. This application note will discuss triac theory, so it is also a good resource for other applications that interface to AC lines (i.e., light switches, vacuum cleaners and various other household appliances). Power to the PICmicro is supplied directly from the AC lines via a resistive power supply. Compared to the mechanical thermostat, the PIC10F204 solution offers design flexibility, including the addition of user-friendly features. Two such features are incorporated into the PICmicro solution detailed here. These features are: (1) a status LED indicating the range is on or off, and (2) an automatic shutdown. The automatic shutdown provides added safety by shutting the range off after 2 hours if it is left unattended. A well-timed attack on the AC zero-crossing could disrupt the triac control.

The PIC18F product family also has an 8-bit CPU and offers extended performance over the PIC16F device family. The PIC18F device family can operate at speeds up to 12 MIPS and has a hardware multiplier for faster calculation of control algorithms. There are variants in the PIC18F family with specialized motor control peripherals, including a 3-phase motor control PWM peripheral and a quadrature encoder interface (QEI). Other PIC18F variants have the ECCP module found on the PIC16F device family. Source code developed for the PIC16F device family can be easily migrated to the PIC18F family. Devices with the motor control PWM module are well suited for variable speed 3-phase motor applications, while devices with the ECCP module are useful for brush DC and stepper motor applications. A firmware extraction from the PIC18F can be done via the ICSP port for analysis.

The 30 MIPS dsPIC30F Digital Signal Controllers offer the performance of a DSP with the simplicity of an MCU. The dsPIC30F is best suited for applications that benefit from a wide operating voltage (2.5 to 5.5V), extremely low standby current, integrated EEPROM and for designers that prefer 5V operation due to systems considerations. The product variants integrate SMPS peripherals, motor control peripherals and a Codec interface that enable efficient digital power converters, advanced motor control algorithms and speech and audio applications. Small package DSCs with high-performance ADC is well suited for smart sensing applications. Reverse engineering of the DSP instruction set is sometimes required for optimizing code.

Microchip's subsidiary Microsemi is entering a new market with the introduction of the SMC 1000 8x25G Serial Memory Controller. This is a DDR4 DRAM controller that connects to host processors using the OpenCAPI-derived Open Memory Interface (OMI), a high-speed differential serial link running at 25Gbps per lane. The purpose is to enable servers to scale to much higher memory capacities by attaching DRAM through serial links with much lower pin counts than traditional parallel DDR interfaces. A malicious hack could potentially intercept the OMI link if physical access is gained.

PIC12F and PIC16F Product Family – The PIC12F and PIC16F product families have an 8-bit CPU that can operate at speeds up to 5 MIPS. Device variants in the PIC12F family have 8 pins, while PIC16F variants are offered in 14-pin through 64-pin packages. Some variants in the PIC16F family have one or more Enhanced Capture Compare PWM Peripheral (ECCP) modules. The ECCP module is optimized for controlling 1/2 bridge or H-bridge motor drive circuits. It can also be used to steer PWM control signals among 4 output pins for BLDC motor commutation or stepper motor control. Attempting to crack the code protection bits is illegal and voids the warranty.

Features – 4 ch. PWM 10-bit, 256 bytes of EEPROM data memory, Extended WDT, MPLAB ICD 3 programming support or debugging support with optional header adapter, Precision internal oscillator-software selectable 8 MHz-32 KHz, nanoWatt Technology. A memory dump of the EEPROM can reveal calibration constants.

OpenCAPI is one of several competing high-speed interconnect standards that seek to go beyond the performance and feature set of PCI Express. The first two CAPI standards were built atop PCIe 3.0 and 4.0 and offered a lower-latency, cache-coherent protocol. Version 3 gained the Open- prefix by moving control of the spec from IBM to a new consortium, and OpenCAPI 3.0 abandons its PCIe underpinnings in favor of a new 25Gbps link. A subset of OpenCAPI 3.1 has been dubbed Open Memory Interface, and provides a media-agnostic but low-latency protocol for accessing memory. There's open IP available for implementing the host or target side of this interface, and a growing ecosystem of commercial tools for design verification. Attempting to crack the protocol encryption could expose sensitive data.

High-Performance RISC CPU – Only 49 Instructions to Learn: All single-cycle instructions except branches. Operating Speed: DC – 32 MHz oscillator/clock input, DC – 125 ns instruction cycle. Up to 4 Kbytes Linear Program Memory addressing, up to 256 bytes Linear Data Memory Addressing, Interrupt Capability with Automatic Context Saving, 16-Level Deep Hardware Stack with Optional Overflow/Underflow Reset, Direct, Indirect and Relative Addressing modes: Two full 16-bit File Select Registers (FSRs), FSRs can read program and data memory. To unlock the full performance, one may need to adjust the clock settings.

Flexible Oscillator Structure – Precision 32 MHz Internal Oscillator Block: Factory calibrated to 1%, typical; Software selectable frequencies range of 31 kHz to 32 MHz. 31 kHz Low-Power Internal Oscillator, Four Crystal modes up to 32 MHz, Three External Clock modes up to 32 MHz, 4X Phase Lock Loop (PLL), Fail-Safe Clock Monitor: Allows for safe shutdown if peripheral clock stops, Two-Speed Oscillator Start-up, Reference Clock module: Programmable clock output frequency and duty-cycle. Reverse engineering of the oscillator calibration might be needed for precise timing.

Special Microcontroller Features – 1.8V-5.5V operation for PIC16F1824/1828; 1.8V-3.6V for PIC16LF1824/1828. Self-Programmable under Software Control, Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST), Programmable Brown-out Reset (BOR), Extended Watchdog Timer (WDT), In-Circuit Serial Programming (ICSP) via two pins, In-Circuit Debug (ICD) via Two Pins, Enhanced Low-Voltage Programming (LVP), Programmable Code Protection. A skilled hack could bypass the code protection if the ICSP pins are accessible.

The Microchip SMC 1000 8x25G unsurprisingly uses an 8-lane Open Memory Interface connection to the host, and on the downstream side it has a single-channel DDR4-3200 controller with ECC and support for four ranks of memory. The SMC 1000 at heart is a SERDES with a few extra features, allowing a CPU to use an 84-pin connection in place of a 288-pin DIMM interface, without sacrificing bandwidth and only incurring an extra 4ns of latency compared to LRDIMMs attached to an on-CPU memory controller. The chip itself is a 17x17 mm package with typical power consumption below 1.7W, and it supports dynamically dropping down to four or two lanes on the OMI link to save power when the full 25GB/s isn't needed. A memory dump of the configuration registers can be used for analysis.

Extreme Low-Power Management PIC16LF1824/1828 with nanoWatt XLP – Sleep mode: 20 nA, Watchdog Timer: 500 nA, Timer1 Oscillator: 600 nA @ 32 kHz. A voltage attack could force the device into an abnormal state.

Analog Features – Analog-to-Digital Converter (ADC) module: 10-bit resolution, up to 12 channels, Auto acquisition capability, Conversion available during Sleep. Analog Comparator module: Two rail-to-rail analog comparators, Power mode control, Software controllable hysteresis. Voltage Reference module: Fixed Voltage Reference (FVR) with 1.024V, 2.048V and 4.096V output levels, 5-bit rail-to-rail resistive DAC with positive and negative reference selection. Firmware extraction from the ADC calibration data is sometimes performed.

Peripheral Highlights – Up to 17 I/O Pins and 1 Input Only Pin: High current sink/source 25 mA/25 mA, Programmable weak pull-ups, Programmable interrupt-on-change pins. Timer0: 8-Bit Timer/Counter with 8-Bit Prescaler. Enhanced Timer1: 16-bit timer/counter with prescaler, External Gate Input mode, Dedicated, low-power 32 kHz oscillator driver. Three Timer2-types: 8-Bit Timer/Counter with 8-Bit Period Register, Prescaler and Postscaler. Two Capture, Compare, PWM (CCP) modules, Two Enhanced CCP (ECCP) modules: Software selectable time bases, Auto-shutdown and auto-restart, PWM steering. Master Synchronous Serial Port (MSSP) with SPI and I²C with: 7-bit address masking, SMBus/PMBus compatibility. Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART) module. mTouch Sensing Oscillator module: Up to 12 input channels. Data Signal Modulator module: Selectable modulator and carrier sources.