ICT / GOULD Microcontroller Unlock

About ICT (Information Chip Technology)

ICT (Information Chip Technology) is a semiconductor company known for its PEEL (Programmable Electrically Erasable Logic) devices, which are used as direct or superset replacements for popular PAL, GAL, and EPLD devices. Because PEEL parts replace older PAL, GAL, and EPLD devices, reverse engineering of an original fuse map is often the starting point for a replacement design. ICT's PEEL products offer enhanced architectures with flexible macrocells, independent output enables, and global preset/clear functions, making them ideal for designers who need more capability than standard SPLDs without the complexity of CPLDs.

Being electrically erasable, PEEL parts are also more resistant to a simple glitch attack than the bipolar PALs they replace. Key advantages of PEEL devices include:

• Fast, low-cost, and easy to use – no sophisticated development system required.
• Enhanced architectures with up to 12 macrocell configurations (vs. standard 16V8/22V10).
• Independent programmable output enables for each I/O pin.
• Global synchronous preset and asynchronous clear product terms.
• Support for buried registers, bi-directional I/O, and combinatorial feedback.

ICT provides the PLACE Development Software (free to qualified designers) with an architectural editor, logic compiler, and waveform simulator. The free PLACE software lets designers unlock the full macrocell flexibility of each PEEL part without purchasing a commercial toolchain. PEEL devices are supported by popular third-party programmer manufacturers such as BP Microsystems. For bring-up debugging, a fuse-map dump of a PEEL part is quick and reveals the exact logic equations in use.

Both replacement categories store their configuration in EEPROM cells, so firmware extraction of the programmed logic is possible with a compatible programmer. PEEL Device Types – Two basic categories:

• Direct replacements – JEDEC and function compatible with industry-standard architectures (e.g., PEEL22CV10A, PEEL22CV10AZ).
• Superset replacements – Provide additional architecture features beyond standard SPLDs (e.g., PEEL18CV8, PEEL18CV8Z, PEEL18LV8Z, PEEL22CV10A+, PEEL22CV10AZ+, PEEL22LV10AZ).

The enhanced macrocells give engineers room to hack together creative logic without adding extra chips. Architectural Enhancements – Superset PEEL devices offer:

• Independent Output Enables – Each I/O has its own programmable output enable, even on registered outputs.
• Global Preset and Clear – Synchronous preset (SP) and asynchronous clear (AC) product terms control all registers.
• Twelve-Configuration Macrocell – Offers 12 configurable macrocell modes, including buried combinational feedback, buried registers, and bi-directional registered I/O.

Quick PEEL Device Cross Reference – The table below shows PEEL device equivalents for popular parts from Altera, AMD, Atmel, Cypress, Intel, Lattice, National, Philips, TI, and Vantis. (Scroll for full list.)

For detailed design information, please refer to ICT application notes and the PLACE development software documentation. Because the PLACE software is offered free to qualified designers, there is no licensing scheme worth cracking.